LSM6DS3 Datasheet, PDF (31/100 Pages) STMicroelectronics – always-on 3D accelerometer and 3D gyroscope

LSM6DS3
Functionality
5.4.1
5.4.2
5.4.3
5.4.4
Bypass mode
In Bypass mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 000), the FIFO is not
operational and it remains empty.
Bypass mode is also used to reset the FIFO when in FIFO mode.
FIFO mode
In FIFO mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 001) data from the output
channels are stored in the FIFO until it is full.
To reset FIFO content, Bypass mode should be selected by writing FIFO_CTRL5 (0Ah)
(FIFO_MODE_[2:0]) to '000' After this reset command, it is possible to restart FIFO mode by
writing FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0]) to '001'.
FIFO buffer memorizes up to 4096 samples of 16 bits each but the depth of the FIFO can be
resized by setting the FTH [11:0] bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h). If the
STOP_ON_FTH bit in CTRL4_C (13h) is set to '1', FIFO depth is limited up to FTH [11:0]
bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h).
Continuous mode
Continuous mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 110) provides a continuous
FIFO update: as new data arrives, the older data is discarded.
A FIFO threshold flag FIFO_STATUS2 (3Bh)(FTH) is asserted when the number of unread
samples in FIFO is greater than or equal to FIFO_CTRL1 (06h) and FIFO_CTRL2
(07h)(FTH [11:0]).
It is possible to route FIFO_STATUS2 (3Bh) (FTH) to the INT1 pin by writing in register
INT1_CTRL (0Dh) (INT1_FTH) = ‘1’ or to the INT2 pin by writing in register INT2_CTRL
(0Eh) (INT2_FTH) = ‘1’.
A full-flag interrupt can be enabled, INT1_CTRL (0Dh) (INT_ FULL_FLAG) = '1', in order to
indicate FIFO saturation and eventually read its content all at once.
If an overrun occurs, at least one of the oldest samples in FIFO has been overwritten and
the OVER_RUN flag in FIFO_STATUS2 (3Bh) is asserted.
In order to empty the FIFO before it is full, it is also possible to pull from FIFO the number of
unread samples available in FIFO_STATUS1 (3Ah) and FIFO_STATUS2 (3Bh)
(DIFF_FIFO[11:0]).
Continuous-to-FIFO mode
In Continuous-to-FIFO mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 011), FIFO
behavior changes according to the trigger event detected in one of the following interrupt
registers FUNC_SRC (53h), TAP_SRC (1Ch), WAKE_UP_SRC (1Bh) and D6D_SRC
(1Dh).
When the selected trigger bit is equal to '1', FIFO operates in FIFO mode.
When the selected trigger bit is equal to '0', FIFO operates in Continuous mode.
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