LSM6DS0 Datasheet, PDF (26/59 Pages) STMicroelectronics – Embedded temperature sensor

Digital interfaces
4
Digital interfaces
LSM6DS0
The registers embedded inside the LSM6DS0 may be accessed through both the I²C and
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pins. To select/exploit the I²C interface, the
CS line must be tied high (i.e connected to Vdd_IO).
Pin name
CS
SCL/SPC
SDA/SDI/SDO
SDO/SA0
Table 13. Serial interface pin description
Pin description
SPI enable
I²C/SPI mode selection (1: SPI idle mode / I²C communication enabled; 0: SPI
communication mode / I²C disabled)
I²C Serial Clock (SCL)
SPI Serial Port Clock (SPC)
I²C Serial Data (SDA)
SPI Serial Data Input (SDI)
3-wire Interface Serial Data Output (SDO)
SPI Serial Data Output (SDO)
I²C less significant bit of the device address
4.1
I²C serial interface
The LSM6DS0 I²C is a bus slave. The I²C is employed to write the data to the registers
whose content can also be read back.
The relevant I²C terminology is provided in the table below.
Term
Transmitter
Receiver
Master
Slave
Table 14. I²C terminology
Description
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
There are two signals associated with the I²C bus: the serial clock line (SCL) and the Serial
DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface. Both the lines must be connected to Vdd_IO through an external pull-
up resistor. When the bus is free, both the lines are high.
The I²C interface is implemeted with fast mode (400 kHz) I²C standards as well as with the
standard mode.
In order to disable the I²C block, the I2C_disable bit must be written to ‘1’ in CTRL_REG9
(23h).
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