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S71GL032A Datasheet, PDF (97/102 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory and RAM | |||
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Advance Information
Parameter List
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
LB#, UB# valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tWC
tCW
tAS
tAW
tBW
tWP
tWR
tWHZ
tDW
tDH
tOW
Data Retention Characteristics (4M Version F)
Speed Bins
70ns
Min
Max
70
-
60
-
0
-
60
-
60
-
50
-
0
-
0
20
30
-
0
-
5
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Item
Symbol
Test Condition
Min Typ Max Unit
VCC for data retention
Data retention current
VDR CS1# ⥠VCC-0.2V (Note 1), VIN ⥠0V. BYTE# = VSS or VCC 1.5
-
3.3 V
IDR VCC=3.0V, CS1# ⥠VCC-0.2V (Note 1), VIN ⥠0V
-
1.0
(Note 2)
10
µA
Data retention set-up time tSDR
See data retention waveform
Recovery time
tRDR
0
-
tRC
-
-
ns
-
Notes:
1. CS1 controlled:CS1#⥠VCC-0.2V. CS2 controlled: CS2 ⤠0.2V.
2. Typical values are not 100% tested.
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
97
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