S71GL032A Datasheet, PDF (71/102 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory and RAM

Advance Information
Erase and Program Operations-S29GL032A Only
Parameter
Speed Options
JEDEC
Std.
Description
90
10
11 Unit
t_AVAV
t_WC
Write Cycle Time (Note 1)
Min 90
100
110
ns
t_AVWL
t_AS
Address Setup Time
Min
0
ns
t_ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t_WLAX
t_AH
Address Hold Time
Min
45
ns
t_AHT
Address Hold Time From CE# or OE# high during toggle bit polling
Min
0
ns
t_DVWH
t_DS
Data Setup Time
Min
35
ns
t_WHDX
t_DH
Data Hold Time
Min
0
ns
t_CEPH CE# High during toggle bit polling
Min
20
ns
t_OEPH OE# High during toggle bit polling
Min
20
ns
t_GHWL
t_GHWL Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
t_ELWL
t_CS
CE# Setup Time
Min
0
ns
t_WHEH
t_CH
CE# Hold Time
Min
0
ns
t_WLWH
t_WP
Write Pulse Width
Min
35
ns
t_WHDL
t_WPH
Write Pulse Width High
Min
30
ns
Write Buffer Program Operation (Notes 2, 3)
Typ
240
t_WHWH1
t_WHWH1
Single Word Program Operation (Note 2)
Accelerated Single Word Program Operation (Note 2)
Typ
60
µs
Typ
54
t_WHWH2
t_WHWH2 Sector Erase Operation (Note 2)
Typ
0.5
sec
t_VHH
V_HH Rise and Fall Time (Note 1)
Min
250
ns
t_VCS
V_CC Setup Time (Note 1)
Min
50
µs
t_BUSY
WE# High to RY/BY# Low
Min 90
100
110
ns
t_POLL
Program Valid before Status Polling
Max
4
µs
Notes:
1. Not 100% tested.
2. See “Erase And Programming Performance” for more information
3. For 1–16 words/1–32 bytes programmed.
4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5. If a program suspend command is issued within t_POLL, the device requires t_POLL before reading status data, once
programming resumes (that is, the program resume command has been written). If the suspend command was issued after
t_POLL, status data is available immediately after programming resumes. See Figure 16.
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
71