S71GL032A Datasheet, PDF (41/102 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory and RAM

Advance Information
Table 19. System Interface String
Addresses
(x16)
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
Data
0027h
0036h
0000h
0000h
0007h
0007h
000Ah
0000h
0001h
0005h
0004h
0000h
Description
V_CC Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
V_CC Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
V_PP Min. voltage (00h = no V_PP pin present)
V_PP Max. voltage (00h = no V_PP pin present)
Reserved for future use
Typical timeout for Min. size buffer write 2^N µs (00h = not supported)
Typical timeout per individual block erase 2^N ms
Typical timeout for full chip erase 2^N ms (00h = not supported)
Reserved for future use
Max. timeout for buffer write 2^N times typical
Max. timeout per individual block erase 2^N times typical
Max. timeout for full chip erase 2^N times typical (00h = not supported)
Note: CFI data related to V_CC and time-outs may differ from actual V_CC and time-outs of the product. Please consult the Ordering
Information tables to obtain the V_CC range for particular part numbers. Please consult the Erase and Programming Performance table
for typical timeout specifications.
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
41