S71GL032A Datasheet, PDF (67/102 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory and RAM

Advance Information
AC Characteristics
Read-Only Operations-S29GL064A only
Parameter
JEDEC
Std.
Description
Test Setup
t_AVAV
t_RC Read Cycle Time (Note 1)
Min
t_AVQV
t_ACC Address to Output Delay
CE#, OE# = V_IL
Max
t_ELQV
t_CE Chip Enable to Output Delay
OE# = V_IL
Max
t_PACC Page Access Time
Max
t_GLQV
t_OE Output Enable to Output Delay
Max
t_EHQZ
t_DF Chip Enable to Output High Z (Note 1)
Max
t_GHQZ
t_DF Output Enable to Output High Z (Note 1)
Max
t_AXQX
t_OH
Output Hold Time From Addresses, CE# or OE#, Whichever Occurs
First
Min
Read
Min
t_OEH
Output Enable Hold Time
(Note 1)
Toggle and
Data# Polling
Min
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 24 for test specifications.
Read-Only Operations-S29GL032A only
Speed Options
90
10
11 Unit
90
100 110 ns
90
100 110 ns
90
100 110 ns
25
30
30 ns
25
30
30 ns
16
ns
16
ns
0
ns
0
ns
10
ns
Parameter
JEDEC Std.
Description
t_AVAV
t_RC Read Cycle Time (Note 1)
t_AVQV t_ACC Address to Output Delay
t_ELQV
t_CE Chip Enable to Output Delay
t_PACC Page Access Time
t_GLQV
t_OE Output Enable to Output Delay
t_EHQZ
t_DF Chip Enable to Output High Z (Note 1)
t_GHQZ
t_DF Output Enable to Output High Z (Note 1)
t_AXQX
t_OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
t_OEH Output Enable Hold Time (Note 1)
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 24 for test specifications.
Read
Toggle and
Data# Polling
Test Setup
CE#, OE# = V_IL
OE# = V_IL
Speed Options
90
10
11 Unit
Min 90 100 110 ns
Max 90 100 110 ns
Max 90 100 110 ns
Max 25
30
30
ns
Max 25
30
30
ns
Max
16
ns
Max
16
ns
Min
0
ns
Min
0
ns
Min
10
ns
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
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