S71GL032A Datasheet, PDF (88/102 Pages) SPANSION – Stacked Multi-Chip Product (MCP) Flash Memory and RAM

Advance Information
ADDRESS
CE#1
CE₂
t_WC
t_SCE
BHE#/BLE#
t_BW
t_SA
WE#
DATA I/O DON’T CARE
t_AW
t_HA
t_PWE
t_HD
t_SD
VALID DATA
t_HZWE
t_LZWE
Figure 30. Write Cycle 3 (WE# Controlled, OE# Low)
Notes:
1. If Chip Enable goes Inactive simultaneously with WE# = High, the output remains in a high-impedance state.
2. During the Don’t Care period in the Data I/O waveform, the I/Os are in output state and input signals should not be applied.
CE#1
CE2
BHE#/BLE#
WE#
Figure 31. Write Cycle 4 (BHE#/BLE# Controlled, OE# Low)
Notes:
1. If Chip Enable goes Inactive simultaneously with WE# = High, the output remains in a high-impedance state.
2. During the Don’t Care period in the Data I/O waveform, the I/Os are in output state and input signals should not be applied.
88
S71GL032A Based MCPs
S71GL032A_00_A0 March 31, 2005