LAN9313 Datasheet, PDF (222/398 Pages) SMSC Corporation – Three Port 10/100 Managed Ethernet Switch with MII

13.1.7.8
Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Virtual PHY Special Control/Status Register (VPHY_SPECIAL_CONTROL_STATUS)
Offset:
1DCh
Index (decimal): 31
Size:
32 bits
This read/write register contains a current link speed/duplex indicator and SQE control.
BITS
DESCRIPTION
31:16
15
14
13:8
7
6:5
4:2
RESERVED
(See Note 13.44)
RESERVED
Switch Looopback MII
When set, transmissions from the switch fabric Port 0(External MII) are not
sent to the External MII. Instead, they are looped back into the switch
engine.
From the MAC viewpoint, this is effectively a FAR LOOPBACK.
If loopback is enabled during half-duplex operation, then the Enable Receive
Own Transmit bit in the Port x MAC Receive Configuration Register
(MAC_RX_CFG_x) must be set for this port. Otherwise, the switch fabric will
ignore receive activity when transmitting in half-duplex mode.
This mode works even if the Isolate bit of the Virtual PHY Basic Control
Register (VPHY_BASIC_CTRL) is set.
RESERVED
Switch Collision Test MII
When set, the collision signal to the switch fabric Port 0(External MII) is
active during transmission from the switch engine.
It is recommended that this bit be used only when using loopback mode.
RESERVED
Current Speed/Duplex Indication
This field indicates the current speed and duplex of the Virtual PHY link.
[4]
[3]
[2]
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Speed
Duplex
RESERVED
10Mbps
half-duplex
100Mbps
half-duplex
RESERVED
RESERVED
10Mbps
full-duplex
100Mbps
full-duplex
RESERVED
TYPE
RO
RO
R/W
RO
R/W
RO
RO
DEFAULT
-
-
0b
-
0b
-
Note 13.45
1 RESERVED
0 SQEOFF
This bit enables/disables the Signal Quality Error (Heartbeat) test.
0: SQE test enabled
1: SQE test disabled
RO
R/W
NASR
Note 13.46
-
Note 13.47
Revision 1.2 (04-08-08)
222
DATASHEET
SMSC LAN9313/LAN9313i