LAN9313 Datasheet, PDF (201/398 Pages) SMSC Corporation – Three Port 10/100 Managed Ethernet Switch with MII

Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
13.1.5.6 Switch Fabric MAC Address High Register (SWITCH_MAC_ADDRH)
Offset:
1F0h
Size:
32 bits
This register contains the upper 16-bits of the MAC address used by the switch for Pause frames. This
register is used in conjunction with Switch Fabric MAC Address Low Register
(SWITCH_MAC_ADDRL). The contents of this register are optionally loaded from the EEPROM at
power-on through the EEPROM Loader if a programmed EEPROM is detected. The least significant
byte of this register (bits [7:0]) is loaded from address 05h of the EEPROM. The second byte (bits
[15:8]) is loaded from address 06h of the EEPROM. The Host can update the contents of this field
after the initialization process has completed.
Refer to Section 13.1.5.7, "Switch Fabric MAC Address Low Register (SWITCH_MAC_ADDRL)" for
information on how this address is loaded by the EEPROM Loader. Section 8.2.4, "EEPROM Loader,"
on page 113 contains additional details on using the EEPROM Loader.
BITS
DESCRIPTION
31:16 RESERVED
15:0 Physical Address[47:32]
This field contains the upper 16-bits (47:32) of the physical address of the
Switch Fabric MACs.
TYPE
RO
R/W
DEFAULT
-
FFFFh
SMSC LAN9313/LAN9313i
201
DATASHEET
Revision 1.2 (04-08-08)