LAN9313 Datasheet, PDF (113/398 Pages) SMSC Corporation – Three Port 10/100 Managed Ethernet Switch with MII

Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
8.2.4
EEPROM Loader
The EEPROM Loader interfaces to the I²C/Microwire EEPROM controller, the PHYs, and to the system
CSRs (via the Register Access MUX). All system CSRs are accessible to the EEPROM Loader.
The EEPROM Loader runs upon a pin reset (nRST), power-on reset (POR), digital reset
(DIGITAL_RST bit in the Reset Control Register (RESET_CTL)), or upon the issuance of a RELOAD
command via the EEPROM Command Register (E2P_CMD). Refer to Section 4.2, "Resets," on
page 41 for additional information on the LAN9313/LAN9313i resets.
The EEPROM contents must be loaded in a specific format for use with the EEPROM Loader. An
overview of the EEPROM content format is shown in Table 8.7. Each section of EEPROM contents is
discussed in detail in the following sections.
Table 8.7 EEPROM Contents Format Overview
EEPROM ADDRESS
0
1
2
3
4
5
6
7
8 - 11
12
13
DESCRIPTION
EEPROM Valid Flag
MAC Address Low Word [7:0]
MAC Address Low Word [15:8]
MAC Address Low Word [23:16]
MAC Address Low Word [31:24]
MAC Address High Word [7:0]
MAC Address High Word [15:8]
Configuration Strap Values Valid Flag
Configuration Strap Values
Burst Sequence Valid Flag
Number of Bursts
14 and above
Burst Data
VALUE
A5h
1^st Byte on the Network
2^nd Byte on the Network
3^rd Byte on the Network
4^th Byte on the Network
5^th Byte on the Network
6^th Byte on the Network
A5h
See Table 8.8
A5h
See Section 8.2.4.5,
"Register Data"
See Section 8.2.4.5,
"Register Data"
8.2.4.1
EEPROM Loader Operation
Upon a pin reset (nRST), power-on reset (POR), digital reset (DIGITAL_RST bit in the Reset Control
Register (RESET_CTL)), or upon the issuance of a RELOAD command via the EEPROM Command
Register (E2P_CMD), the EPC_BUSY bit in the EEPROM Command Register (E2P_CMD) will be set.
While the EEPROM Loader is active, the READY bit of the Hardware Configuration Register
(HW_CFG) is cleared and no writes to the LAN9313/LAN9313i should be attempted. The operational
flow of the EEPROM Loader can be seen in Figure 8.14.
SMSC LAN9313/LAN9313i
113
DATASHEET
Revision 1.2 (04-08-08)