LAN9313 Datasheet, PDF (121/398 Pages) SMSC Corporation – Three Port 10/100 Managed Ethernet Switch with MII

Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Figure 8.2 illustrates a typical single and multiple register write.
nSCS
SCK (active low) X
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1_... 4
9
5
4
6
4
7
4
8
X
SCK (active high) X
SI X
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1 _... 4
9
5
4
6
4
7
4
8
X
0
0
Instruction
0000
1
1
Address
A9
A8
A7
A6
A5
A4
A3
A2
D
31
D
30
...^Data
D
29
D2 D1 D0
X
SO
Z
Single Register Write
nSCS
... _{SCK (active low)} X
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
...
X
SCK (active high) X
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1_...
9
...
X
SI
X
0
0
Instruction
0 0 dec inc 1
... ... ^Address
Data 1...
1
A9
A8
A7
A6
A5
A4
A3
A2
D
31
D
30
D
29
...Data m ...Data m+1
D2
D1
D0
D
31
D
30
D
29
...Data n
D2 D1 D0 X
SO
Z
Multiple Register Writes
Figure 8.2 SPI Writes
8.5
I²C Slave Operation
When in MAC/PHY I²C managed mode, the I²C slave interface is used for CPU management of the
LAN9313/LAN9313i. All system CSRs are accessible to the CPU in these modes. I²C mode is selected
when the mngt_mode_strap[1:0] inputs are set to 10b. The I²C slave controller implements the low
level I²C slave serial interface (start and stop condition detection, data bit transmission and reception,
and acknowledge generation and reception), handles the slave command protocol, and performs
system register reads and writes. The I²C slave controller conforms to the Philips I²C-Bus
Specification.
The I²C slave serial interface consists of a data wire (SDA) and a serial clock (SCL). The serial clock
is driven by the master, while the data wire is bi-directional. Both signals are open-drain and require
external pull-up resistors. Both signals include Schmitt trigger inputs and digital input filters. The digital
filters reject pulses that are less than 100nS.
The I²C slave serial interface supports the standard-mode speed of up to 100KHz and the fast-mode
speed of 400KHz. Refer to the Philips I²C-Bus Specification for detailed I²C timing information.
8.5.1 I²C Slave Command Format
The I²C slave serial interface supports single register and multiple register read and write commands.
A read or write command is started by the master first sending a start condition, followed by a control
byte. The control byte consists of a 7-bit slave address and a 1-bit read/write indication (R/~W). The
slave address used by the LAN9313/LAN9313i is 0001010b, written as SA6 (first bit on the wire)
through SA0 (last bit on the wire). Assuming the slave address in the control byte matches this
address, the control byte is acknowledged by the LAN9313/LAN9313i. Otherwise, the entire sequence
is ignored until the next start condition. The I²C command format can be seen in Figure 8.3.
If the read/write indication (R/~W) in the control byte is a 0 (indicating a potential write), the next byte
sent by the master is the register address. After the address byte is acknowledged by the
SMSC LAN9313/LAN9313i
121
DATASHEET
Revision 1.2 (04-08-08)