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SI5347 Datasheet, PDF (8/59 Pages) Silicon Laboratories – DUAL/QUAD DSPLL ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATORS
Si5347/46
Table 5. Differential Clock Output Specifications
(VDD = 1.8 V ±5%, VDDA = 3.3V ±5%, VDDO = 1.8 V ±5%, 2.5 V ±5%, or 3.3 V ±5%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min Typ Max Unit
Output Frequency
Duty Cycle
Output-Output Skew
fOUT
DC
TSK
0.0001 —
fOUT < 400 MHz
48
—
400 MHz < fOUT < 712.5 MHz 44
—
Differential Output,
Normal Swing Mode
—
20
712.5
52
55
50
MHz
%
%
ps
Differential Output,
Low Power Swing Mode
—
20 100
ps
OUT-OUT Skew
TSK_OUT Measured from the positive to —
0
100
ps
negative output pins
Output Voltage Amplitude1
Normal Mode
VOUT
VDDO = 3.3 V,
2.5 V, or 1.8 V
LVDS
350 470 550 mVpp_se
VDDO = 3.3 V,
2.5 V
Low Power Mode
LVPECL
660 810 1000
VOUT
VDDO = 3.3 V,
2.5 V, or 1.8 V
LVDS
300 420 530 mVpp_se
VDDO = 3.3 V,
2.5 V
LVPECL
620 820 1060
Notes:
1. Output amplitude and common mode voltage are programmable through register settings and can be stored in NVM.
Each output driver can be programmed independently. The typical normal mode (or low power mode) LVDS maximum
is 100 mV (or 80 mV) higher than the TIA/EIA-644 maximum.Refer to the Si5347/46 Family Reference Manual for
more suggested output settings. Not all combinations of voltage amplitude and common mode voltages settings are
possible.
2. Driver output impedance depends on selected output mode (Normal, Low Power). Refer to the Si5347/46 Family
Reference Manual for more information.
3. Measured for 156.25 MHz carrier frequency. Sinewave noise added to VDDO (1.8 V = 50 mVpp, 2.5 V/
3.3 V = 100 mVpp) and noise spur amplitude measured.
4. Measured across two adjacent outputs, both in LVDS mode, with the victim running at 155.52 MHz and the aggressor
at 156.25 MHz. Refer to application note, “AN862: Optimizing Si534x Jitter Performance in Next Generation Internet
Infrastructure Systems”, guidance on crosstalk minimization. Note that all active outputs must be terminated when
measuring crosstalk.
OUTx
OUTx
Vcm
Vcm
Vpp_se
Vpp_se
Vpp_diff = 2*Vpp_se
8
Rev. 1.1