SI5347 Datasheet, PDF (48/59 Pages) Silicon Laboratories – DUAL/QUAD DSPLL ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATORS

Si5347/46
Table 17. Si5347/46 Pin Descriptions¹ (Continued)
Pin
Name
Pin Number
Si5347A/B Si5347C/D Si5346
Pin
Type²
Function
Serial Interface
I2C_SEL
39
39
38
I I2C Select. This pin selects the serial interface mode as I²C
(I2C_SEL = 1) or SPI (I2C_SEL = 0). This pin is internally pulled
high. See Note ³.
SDA/
18
SDIO
A1/SDO
17
18
13
I/O Serial Data Interface. This is the bidirectional data pin (SDA) for
the I²C mode, or the bidirectional data pin (SDIO) in the 3-wire SPI
mode, or the input data pin (SDI) in 4-wire SPI mode. When in I²C
mode, this pin must be pulled-up using an external resistor of
> 1 k. No pull-up resistor is needed when in SPI mode.
See Note ³.
17
15
I/O Address Select 1/Serial Data Output. In I²C mode this pin func-
tions as the A1 address input pin. In 4-wire SPI mode this is the
serial data output (SDO) pin. See Note ³.
SCLK
16
16
14
I Serial Clock Input. This pin functions as the serial clock input for
both I²C and SPI modes. When in I²C mode, this pin must be
pulled-up using an external resistor of > 1 k. No pull-up resistor is
needed when in SPI mode. See Note ³.
A0/CS
19
19
16
I Address Select 0/Chip Select. This pin functions as the hardware
controlled address A0 in I²C mode. In SPI mode, this pin functions
as the chip select input (active low). This pin is internally pulled-up.
See Note ³.
Notes:
1. Refer to the Si5347/46 Family Reference Manual for more information on register setting names.
2. I = Input, O = Output, P = Power.
3. The IO_VDD_SEL control bit (0x0943 bit 0) selects 3.3 V or 1.8 V operation.
4. The voltage on the VDDS pin(s) determines 3.3 V or 1.8 V operation.
48
Rev. 1.1