SI5347 Datasheet, PDF (7/59 Pages) Silicon Laboratories – DUAL/QUAD DSPLL ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATORS

Si5347/46
Table 4. Serial and Control Input Pin Specifications
(V_DD = 1.8 V ±5%, V_DDA = 3.3 V ±5%, V_DDS = 3.3 V ±5%, 1.8 V ±5%, T_A = –40 to 85 °C)
Parameter
Symbol Test Condition
Min
Typ
Max
Unit
Si5347 Serial and Control Input Pins (I2C_SEL, RST, OE0, A1/SDO, SCLK, A0/CS, FINC, A0/CS, SDA/SDIO,
DSPLL_SEL[1:0])
Input Voltage
V_IL
—
— 0.3 x V_DDIO1
V
V_IH
0.7 x
—
—
V
V_DDIO1
Input Capacitance
C_IN
—
2
—
pF
Input Resistance
R_L
—
20
—
k
Minimum Pulse Width
PW
RST, FINC
100
—
—
ns
Update Rate
F_UR
Si5347 Control Input Pins (FDEC, OE1)
FINC
—
—
1
MHz
Input Voltage
Input Capacitance
Minimum Pulse Width
V_IL
—
— 0.3 x V_DDS
V
V_IH
0.7 x V_DDS —
—
V
C_IN
—
2
—
pF
PW
FDEC
100
—
—
ns
Update Rate
F_UR
FDEC
—
—
1
MHz
Si5346 Serial and Control Input Pins (I2C_SEL, RST, OE0, OE1, A1/SDO, SCLK, A0/CS, SDA/SDIO)
Input Voltage
V_IL
—
— 0.3 x V_DDIO1
V
V_IH
0.7 x
—
—
V
V_DDIO1
Input Capacitance
C_IN
—
2
—
pF
Input Resistance
R_L
—
20
—
k
Minimum Pulse Width
PW
RST
100
—
—
ns
Note:
1. V_DDIO is determined by the IO_VDD_SEL bit. It is selectable as V_DDA or V_DD.
Rev. 1.1
7