K4E661612D Datasheet, PDF (9/36 Pages) Samsung semiconductor – CMOS DRAM

Industrial Temperature
K4E661612D,K4E641612D
1 6 . tC W L i s s p e c i f i e d f r o m W f a l l i n g e d g e t o t h e e a r l i e r C A S r i s i n g e d g e .
1 7 . tCSR i s r e f e r e n c e d t o e a r l i e r C A S f a l l i n g b e f o r e R A S t r a n s i t i o n l o w .
1 8 . tC H R i s r e f e r e n c e d t o t h e l a t e r C A S r i s i n g h i g h a f t e r R A S t r a n s i t i o n l o w .
RAS
LCAS
UCAS
t CSR
tCHR
CMOS DRAM
1 9 . tDS i s s p e c i f i e d f o r t h e e a r l i e r C A S f a l l i n g e d g e a n d tDH i s s p e c i f i e d b y t h e l a t e r C A S f a l l i n g e d g e i n e a r l y w r i t e c y c l e .
LCAS
UCAS
DQ0 ~ DQ15
tD S
tDH
Din
20. If R A S goes high before C A S high going, the open circuit condition of the output is achieved by CAS high going.
2 1 . _{tASC ≥6 n s , A s s u m e t T=2.0ns, if t ASC ≤ 6 n s , t h e n t H P C ( m i n ) a n d t C A S( m i n ) m u s t b e i n c r e a s e d b y t h e v a l u e o f " 6 n s - t ASC".}
2 2 . _{I f t R A S S ≥ 1 0 0 u s , t h e n R A S p r e c h a r g e t i m e m u s t u s e tR P S i n s t e a d o f t R P.}
2 3 . F o r R A S - o n l y - R e f r e s h a n d B u r s t C A S - b e f o r e -R A S r e f r e s h m o d e , 4 0 9 6 c y c l e s ( 4 K / 8 K ) o f b u r s t r e f r e s h m u s t b e e x e c u t e d w i t h i n
64ms before and after self refresh, in order to meet refresh specification.
24. For distributed C A S-before-R A S with 15.6us interval, CBR refresh should be executed with in 15.6us immediately before and
after self refresh in order to meet refresh specification.