K4E661612D Datasheet, PDF (7/36 Pages) Samsung semiconductor – CMOS DRAM

Industrial Temperature
K4E661612D,K4E641612D
TEST MODE CYCLE
Parameter
Symbol
Random read or write cycle time
Read-modify-write cycle time
Access time fromRAS
Access time fromCAS
Access time from column address
R A S pulse width
C A S pulse width
RAS hold time
CAS hold time
Column Address to R A S lead time
C A S to W delay time
R A S to W delay time
Column Address to W delay time
Hyper Page cycle time
Hyper Page read-modify-write cycle time
R A S pulse width (Hyper page cycle)
Access time fromC A S precharge
O E access time
O E to data delay
OE command hold time
tRC
tR W C
tR A C
tC A C
tA A
tR A S
tC A S
tR S H
tC S H
tR A L
tC W D
tR W D
tA W D
tH P C
tH P R W C
tR A S P
tC P A
tO E A
tO E D
tO E H
-45
Min
Max
79
110
50
17
28
50
10K
12
10K
18
39
28
29
62
40
22
52
50
200K
29
17
13
13
-50
Min
Max
89
121
55
18
30
55
10K
13
10K
18
43
30
35
72
47
25
53
55
200K
33
18
18
18
CMOS DRAM
( Note 11 )
-60
Min
Max
Units
Note
109
ns
145
ns
65
ns
3,4,10,12
20
ns
3,4,5,12
35
ns
3,10,12
65
10K
ns
15
10K
ns
20
ns
50
ns
35
ns
39
ns
7
84
ns
7
54
ns
7
30
ns
21
61
ns
21
65
200K
ns
40
ns
3
20
ns
3
20
ns
20
ns