K5D5657DCM-F015 Datasheet, PDF (73/74 Pages) Samsung semiconductor – MCP Specification of 256Mb NAND and 256Mb Mobile SDRAM

K5D5657DCM-F015
Extended Mode Register Set Cycle
0123456
CLOCK
CKE
HIGH
CS
RAS
CAS
ADDR
*Note 2
*Note 1
*Note 3
Key
Ra
BA0
BA1
DQ
Hi-Z
WE
DQM
Preliminary
MCP MEMORY
EMRS New Command
*NOTE:
EXTENDED MODE REGISTER SET CYCLE
1. CS, RAS, CAS, BA0, BA1 & WE activation at the same clock cycle with address key will set internal mode register.
2. Minimum 2 clock cycles should be met before new RAS activation.
3. Please refer to Mode Register Set table.
: Don’t care
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Revision 0.0
June 2003