K5D5657DCM-F015 Datasheet, PDF (30/74 Pages) Samsung semiconductor – MCP Specification of 256Mb NAND and 256Mb Mobile SDRAM

K5D5657DCM-F015
Preliminary
MCP MEMORY
Data Protection & Power up sequence
The device is designed to offer protection from any involuntary program/erase during power-transitions. An internal voltage detector
disables all functions whenever Vcc is below about 1.8V. WP pin provides hardware protection and is recommended to be kept at VIL
during power-up and power-down and recovery time of minimum 10µs is required before internal circuit gets ready for any command
sequences as shown in Figure 14. The two step command sequence for program/erase provides additional software protection.
Figure 14. AC Waveforms for Power Transition
~ 2.0V
VCC
High
WP
~ 2.0V
WE
10µs
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Revision 0.0
June 2003