K5D5657DCM-F015 Datasheet, PDF (38/74 Pages) Samsung semiconductor – MCP Specification of 256Mb NAND and 256Mb Mobile SDRAM

K5D5657DCM-F015
Preliminary
MCP MEMORY
A. MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with Normal MRS
Address
BA0 ~ BA1^*1
BA0
A11 ~ A10/ _A9^*2 _{A8 A7 A6 A5 A4 A3 A2 A1 A0}
AP
Function
"0" Setting for Normal
MRS
RFU
W.B.L Test Mode
CAS Latency
BT
Burst Length
Normal MRS Mode
Test Mode
CAS Latency
Burst Type
Burst Length
A8 A7
Type
A6 A5 A4 Latency A3
Type
A2 A1 A0 BT=0
BT=1
0 0 Mode Register Set 0 0 0 Reserved 0
Sequential
000
1
1
01
Reserved
001
1
1
Interleave
001
2
2
10
Reserved
010
2
Mode Select
010
4
4
11
Reserved
011
3
BA1 BA0 Mode 0 1 1
8
8
Write Burst Length
A9
Length
0
Burst
1 0 0 Reserved
1 0 0 Reserved Reserved
1 0 1 Reserved
Setting _{1 0 1 Reserved Reserved}
0 0 for Nor-
1 1 0 Reserved
mal MRS 1 1 0 Reserved Reserved
1
Single Bit
1 1 1 Reserved
1 1 1 Full Page Reserved
Register Programmed with Extended MRS
Address BA1 BA0 A11 ~ A10/AP A9
Function Mode Select
RFU
Full Page Length x16 : 64Mb(256), 128Mb(512),256Mb(512),512Mb(1024)
A8 A7 A6 A5 A4 A3 A2 A1 A0
DS
RFU
PASR
EMRS for PASR(Partial Array Self Ref.) & DS(Driver Strength)
BA1
0
0
1
1
BA0
0
1
0
1
A11~A10/AP
Mode Select
Mode
A6
Normal MRS
0
Reserved
0
EMRS for Mobile SDRAM
1
Reserved
1
Reserved Address
A9
A8
A7
Driver Strength
A5 Driver Strength
0
Full
1
1/2
0
1/4
1
1/8
A4
A3
0
0
0
0
0
0
NOTES:
1.RFU(Reserved for future use) should stay "0" during MRS cycle.
2.If A9 is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
PASR
A2 A1 A0 # of Banks
000
4 Banks
001
2 Banks
010
1 Bank
011
Reserved
100
Reserved
101
Reserved
110
Reserved
111
Reserved
- 38 -
Revision 0.0
June 2003