K5D5657DCM-F015 Datasheet, PDF (51/74 Pages) Samsung semiconductor – MCP Specification of 256Mb NAND and 256Mb Mobile SDRAM

K5D5657DCM-F015
Preliminary
MCP MEMORY
10. Clock Suspend Exit & Power Down Exit
1) Clock Suspend (=Active Power Down) Exit
CLK
CKE
Internal ^*1
CLK
CMD
tSS
RD
2) Power Down (=Precharge Power Down) Exit
CLK
CKE
Internal ^*2
CLK
CMD
tSS
NOP ACT
11. Auto Refresh & Self Refresh
Auto Refresh
An auto refresh command is issued by having CS, RAS and CAS held low with CKE and WE high at the rising edge of the
clock(CLK). All banks must be precharged and idle for tRP(min) before the auto refresh command is applied. No control of the external
address pins is required once this cycle has started because of the internal address counter. When the refresh cycle has completed,
all banks will be in the idle state. A delay between the auto refresh command and the next activate command or subsequent auto
refresh command must be greater than or equal to the tARFC(min).
CLK
Command PRE
CKE = High
Auto
Refresh
tRP
tARFC(min) = 105ns
CMD
Self Refresh
A Self Refresh command is defined by having CS, RAS, CAS and CKE held low with WE high at the rising edge of the clock. Once
the self Refresh command is initiated, CKE must be held low to keep the device in Self Refresh mode. After 1 clock cycle from the self
refresh command, all of the external control signals including system clock(CLK) can be disabled except CKE. The clock is internally
disabled during Self Refresh operation to reduce power. To exit the Self Refresh mode, supply stable clock input before returning
CKE high, assert deselect or NOP command and then assert CKE high. In case that the system uses burst auto refresh during normal
opreation, it is recommended to use burst 4096 auto refresh cycle immediately before entering self refresh mode and after exiting in
self refresh mode. On the other hand, if the system uses the distributed auto refresh, the system only has to keep the refresh duty
cycle.
CLK
Command
CKE
Self
Refresh
tSS
Stable Clock
NOP
tSRFX(min) = 120ns
tSS
ACT
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Revision 0.0
June 2003