K5D5657DCM-F015 Datasheet, PDF (47/74 Pages) Samsung semiconductor – MCP Specification of 256Mb NAND and 256Mb Mobile SDRAM

K5D5657DCM-F015
3. CAS Interrupt (I)
Preliminary
MCP MEMORY
1) Read interrupted by Read (BL=4) ^*1
CLK
CMD
ADD
RD RD
AB
DQ(CL2)
DQ(CL3)
QA0 QB0 QB1 QB1 QB3
tCCD ^*2
QA0 QB0 QB1 QB1 QB3
2) Write interrupted by Write (BL=2)
CLK
CMD
ADD
WR WR
tCCD ^*2
AB
DQ
DA0 DB0 DB1
tCDL ^*3
3) Write interrupted by Read (BL=2)
CLK
CMD
ADD
WR RD
tCCD ^*2
AB
DQ(CL2)
DQ(CL3)
DA0
DA0
tCDL ^*3
QB0 QB1
QB0 QB1
*NOTE:
1. By " Interrupt", It is meant to stop burst read/write by external command before the end of burst.
By "CAS Interrupt", to stop burst read/write by CAS access ; read and write.
2. tCCD : CAS to CAS delay. (=1CLK)
3. tCDL : Last data in to new column address delay. (=1CLK)
- 47 -
Revision 0.0
June 2003