K4C89183AF Datasheet, PDF (6/55 Pages) Samsung semiconductor – 288Mb x18 Network-DRAM2 Specification

K4C89183AF
Block Diagram
CLK
DLL
CLK
CLOCK
PD
BUFFER
CS
COMMAND
FN
DECODER
A0 ~ A14
BA0, BA1
ADDRESS
BUFFER
REFRESH
COUNTER
To Each Block
CONTROL
SIGNAL
GENERATOR
MODE
REGISTER
BANK #3
BANK #2
BANK #1
BANK #0
MEMORY
CELL
ARRAY
UPPER ADDRESS
LATCH
LOWER ADDRESS
LATCH
COLUMN DECODER
BURST
COUNTER
WRITE ADDRESS
LATCH
ADDRESS
COMPARATOR
DS
QS
READ
DATA
BUFFER
WRITE
DATA
BUFFER
DQ BUFFER
DQ0 ~ DQ17
Note : The K4C89183AD configuration is 4 Bank of 32768 x 128 x 18 of cell array with the DQ pins numbered DQ0~DQ17.
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REV. 0.7 Jan. 2005