K4C89183AF Datasheet, PDF (27/55 Pages) Samsung semiconductor – 288Mb x18 Network-DRAM2 Specification

K4C89183AF
Single Bank Read Timing (CL=6)
0
1
2
CLK
CLK
Command
Address
RDA LAL
l_RCD=1cycle
UA
LA
3
4
5
l_RC=7cycles
DESL
l_RAS=6cycles
6
7
8
9
10
11
12
13
14
15
RDA LAL
l_RCD=1cycle
UA
LA
l_RC=7cycles
DESL
l_RAS=6cycles
RDA LAL
l_RCD=1cycle
UA
LA
Bank Add.
#0
Unidirectional DS/QS mode
DS
(Input)
QS
(Output)
Low
DQ
Hi-Z
(Output)
Unidirectional DS/Free Running QS mode
DS
(Input)
QS
(Output)
DQ
Hi-Z
(Output)
CL=6
CL=6
#0
Q0 Q1 Q2 Q3
CL=6
Q0 Q1 Q2 Q3
CL=6
#0
Q0 Q1 Q2
Q0 Q1 Q2
- 27 -
REV. 0.7 Jan. 2005