K4C89183AF Datasheet, PDF (28/55 Pages) Samsung semiconductor – 288Mb x18 Network-DRAM2 Specification

K4C89183AF
Single Bank Write Timing (CL=4)
CLK
CLK
Command
Address
0
1
WRA LAL
l_RCD=1cycle
UA
LA
2
3
4
5
6
l_RC=5cycles
DESL
l_RAS=4cycles
WRA LAL
l_RCD=1cycle
UA
LA
7
8
9
l_RC=5cycles
DESL
l_RAS=4cycles
10
11
WRA LAL
l_RCD=1cycle
UA
LA
12
13
14
15
l_RC=5cycles
DESL
l_RAS=4cycles
WRA
UA
Bank Add.
#0
Unidirectional DS/QS mode
DS
(Input)
QS
(Output)
Low
DQ
(Input)
#0
WL=3
D0 D1 D2 D3
Unidirectional DS/Free Running QS mode
DS
(Input)
QS
(Output)
DQ
(Input)
WL=3
D0 D1 D2 D3
#0
WL=3
D0 D1 D2 D3
WL=3
D0 D1 D2 D3
#0
WL=3
D0 D1 D2 D3
WL=3
D0 D1 D2 D3
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REV. 0.7 Jan. 2005