HD66789 Datasheet, PDF (86/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
VSYNC
Back porch
(14 raster-rows)
RAM write
Raster-row
240
Display
(240 raster-rows)
Display
operation
Preliminary
RAM write at 10MHz
44240 times
R-C oscillation
10%
RAM write
at 3.15 MHz
Display
operation
Display operation
Front porch
(2 raster-rows)
Blanking period
0
4.22
Back-porch 14H
VSYNC
13.41
13.55
Operation through VSYNC interface
[ms]
16.74
60Hz
Notes to the VSYNC interface
1. The aforementioned example of calculation is just a result of calculation. In the actual settings, causes
for the fluctuations of internal clocks and so on should be taken into consideration. It is necessary to
make a setting for the RAM write speed with enough margins.
2. The aforementioned example of calculation is the value in case of writing over the entire screen.
Limiting the area for the moving picture display will create more margins for the RAM write speed.
VSYNC
Back porch
(14 raster-rows)
(20 raster-rows)
Moving picture area
(200 raster-rows)
Raster-row
240
220
RAM write
at 3.15 MHz
R-C oscillation
10%
Display operation
Display
operation
(20 raster-rows)
Front porch
(2 raster-rows)
20
0
4.22
Back-porch 14H
VSYNC
11.17
13.55
[ms]
13.52 16.74
60Hz
Limiting moving picture display area
3. A front porch period continues after the completion of 1 frame display and until the next input of
VSYNC.
4. The transition between the internal clock operation mode (DM1-0 = 00) and the VSYNC interface
mode becomes effective after displaying one frame made during instruction setting.
5. In the VSYNC interface mode, the partial display, vertical scroll, and interlaced drive functions are not
available.
6. In the VSYNC interface mode, set AM to 0 to transmit display data in the aforementioned method.
7. In the VSYNC interface mode, write display data to RAM in the high speed write mode (HWM = 1)
Rev.0.12, May 09 2003, page 86 of 156