HD66789 Datasheet, PDF (103/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
High-Speed RAM Write with Window Address
To rewrite the data in an arbitrary rectangular area of RAM consecutively in high speed, the number of
RAM access should be made 4 multiple times. Accordingly some window-address range may require
dummy write operation to make the RAM access 4 multiple times. The number of dummy write is set
when setting the window address as follows.
The horizontal window-address range specifying bits (HSA1-0, HEA1-0) specify the number of dummy
write operations executed at the start and end of the data to write to RAM. The total RAM access must be
4 multiple times per line.
Number of Dummy Write Operations in High-Speed RAM Write (HSA Bits)
HSA1
0
0
1
1
HSA0
0
1
0
1
Number of Dummy Write Operations
inserted
0
1
2
3
Number of Dummy Write Operations in High-Speed RAM Write (HEA Bits)
HEA1
0
0
1
1
HEA0
0
1
0
1
Number of Dummy Write Operations
inserted
3
2
1
0
The number of RAM access when writing data in the horizontal direction must be made 4 × N times by
including the dummy writes.
Horizontal RAM write = start dummy write + write data + end dummy write = 4 × N (times)
An example of RAM write in high speed RAM write mode with the window address is as follows.
The RAM data in the specified window-address range is written over consecutively in high speed by
inserting two dummy writes at the start of the line and three dummy writes at the end of the line. The
number of dummy writes is specified with the window-address range specifying bits. In this case, set
HSA1-0 to 10, HEA1-0 to 00.
Rev.0.12, May 09 2003, page 103 of 156