HD66789 Datasheet, PDF (77/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
Data transmission synchronizing in 9-bit bus interface mode
The HD66789 supports a data transmission synchronizing function, which resets the upper/lower counter
that counts the number of transmission of upper/lower 9-bit data in the 9-bit bus interface mode. When a
discrepancy occurs in the upper/lower 9-bit data transmission due to effects from noise and so on, the “00”
H instruction is written 4 times consecutively to forcibly reset the upper/lower counter so that data
transmission restarts with an upper 9-bit data transmission. The excursion can be recovered by executing
the synchronizing function periodically.
RS
RD
WR
DB17-9
Upper
Lower
00H
00H
00H
00H
Upper
Lower
(1)
(2)
(3)
(4)
(9-bit transmission synchronization)
9-bit data transmission synchronization
Rev.0.12, May 09 2003, page 77 of 156