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HD66789 Datasheet, PDF (2/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit
HD66789
Preliminary
Display Control 1 (R07h)....................................................................................................... 36
Display Control 2 (R08h)....................................................................................................... 38
Display control 3 (R09h) ....................................................................................................... 40
Frame Cycle Control (R0Bh)................................................................................................. 41
External Display Interface Control (R0Ch) ........................................................................... 44
Power Control 1 (R10h) Power Control 2 (R11h) ................................................................. 48
Power Control 3 (R12h) Power Control 4 (R13h) ................................................................. 51
RAM Address Set (R21h)...................................................................................................... 53
Write Data to GRAM (R22h)................................................................................................. 54
RAM Access through RGB-I/F and System I/F..................................................................... 59
Read Data Read from GRAM (R22h).................................................................................... 60
RAM Write Data Mask (R23h) RAM Write Data Mask (R24h) ........................................... 63
γ Control (R30h to R39h)....................................................................................................... 64
Gate Scan Position (R40h)..................................................................................................... 65
Vertical Scroll Control (R41h)............................................................................................... 66
1st-Screen Drive Position (R42h) 2nd-Screen Drive Position (R43h)................................... 66
Horizontal RAM Address Position (R44h) Vertical RAM Address Position (R45h) ............ 67
Instruction List (T.B.D.) ..................................................................................... 68
Reset Function .................................................................................................... 69
Interface Specifications....................................................................................... 71
System Interface.................................................................................................. 73
80-system 18-bit interface...................................................................................................... 74
80-system 16-bit interface...................................................................................................... 75
80-system 9-bit interface........................................................................................................ 76
Data transmission synchronizing in 9-bit bus interface mode................................................ 77
80-system 8-bit interface........................................................................................................ 78
Data transmission synchronizing in 8-bit bus interface mode................................................ 80
Serial Peripheral interface (SPI) ............................................................................................ 81
VSYNC Interface................................................................................................ 84
Conditions on using VSYNC interface .................................................................................. 86
External Display Interface .................................................................................. 88
RGB interface ........................................................................................................................ 88
VLD and ENABLE signals.................................................................................................... 89
RGB interface timing ............................................................................................................. 89
Moving picture display .......................................................................................................... 91
RAM access through system interface in RGB-I/F mode ...................................................... 91
6-bit RGB interface................................................................................................................ 92
Data transmission synchronization in 6-bit RGB interface mode .......................................... 92
16-bit RGB interface.............................................................................................................. 93
18-bit RGB interface.............................................................................................................. 94
Conditions on using external display interface ...................................................................... 95
Rev.0.12, May 09 2003, page 2 of 156