HD66789 Datasheet, PDF (19/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
2. External Display Interface
The HD66789 incorporates RGB and VSYNC interfaces as an external interface for displaying moving
pictures. When RGB-I/F is selected, the display operation is executed in synchronization with the
externally supplied signals, VSYNC, HSYNC, and DOTCLK. The display data (PD17-0) are written
according to the values of the data enable signal (ENABLE) and data valid signal (VLD) in synchronization
with VSYNC, HSYNC, and DOTCLK signals. This data write method allows flicker-free screen update.
When VSYNC-I/F is selected, operations other than the frame synchronization by VSYNC signal are
synchronized with internal clocks. The display data are written to GRAM through a system interface. In
this case, there are constraints on the timing and methods of RAM update. See the “External Display
Interface” section for more details.
Switching between conventional system interfaces and external display interfaces is made through
instructions. An optimum interface is selected whether the screen is displaying moving or still pictures.
All data written through RGB-I/F are written to GRAM. Therefore, data is transmitted only when the
screen is being updated, which reduces the amount of data transmission, thereby saving power when
moving pictures are being displayed.
3. Bit Operations
The HD66789 supports a write data mask function that selects and writes data into GRAM by bit, and
performs logical operation or conditional rewrite on the contents of compare registers and the data to write
to GRAM. For details, see the “Graphics Operation Functions” section.
4. Address Counter (AC)
The address counter (AC) assigns address to GRAM. When an address set instruction is written into the IR,
the address information is sent from the IR to the AC.
After writing data into GRAM, the AC is automatically updated plus or minus 1. The AC is not updated
when the data are read from GRAM. Window address function enables data write only in the rectangular
area of GRAM specified by the window address.
5. Graphics RAM (GRAM)
GRAM is a graphics RAM that stores bit-pattern data of 176 x 240 bytes with 18 bits per pixel.
6. Gray scale power supply voltage generating circuit
The grayscale voltage generation circuit generates liquid crystal drive voltage according to the grayscale
data set in the γ-correction register, enabling 262,144-color display. For details, see the “γ-Correction
Register” section.
7. Timing Generator
The timing generator generates timing signals for the operation of internal circuits such as GRAM. The
timing for display operation such as RAM read and the internal operation timing such as access from MPU
are generated in a way to avoid mutual interfere. The interface signals (M, FLM, CL1, EQ, DCCLK,
Rev.0.12, May 09 2003, page 19 of 156