HD66789 Datasheet, PDF (45/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
DM1–0:Specify the display operation mode. The interface through which display operation is executed is
selected with DM1-0 bits. This setting enables switching between internal clock operation and external
display interface. Switching within the external display interface modes (between RGB-I/F and VSYNC-
I/F) cannot be made.
DM Bits
DM1
0
0
1
1
DM0
0
1
0
1
Display Interface
Internal clock operation
RGB interface
VSYNC interface
Setting disabled
RM: Specify the interface for RAM accesses. RAM is accessible only through the interface specified with
RM bit. When the display data is written through RGB-I/F, set RM = 1. The RM-bit setting can be made
irrespective of the display operation mode. This means the display data can be updated through a system
interface even during the display period through RGB interface by setting RM = 0.
RM Bit
RM Interface for RAM Access
0
System interface/VSYNC interface
1
RGB interface
Rev.0.12, May 09 2003, page 45 of 156