HD66789 Datasheet, PDF (32/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
NL bits
NL4 NL3 NL2 NL1 NL0 Display Size
Liquid crystal
drive
raster-rows
Gate driver lines
Used
00
0
0
0
Setting disabled
Setting disabled Setting disabled
00
0
0
1
528 x 16 dots
16
G1–G16
00
0
1
0
528 x 24 dots
24
G1–G24
00
0
1
1
528 x 32 dots
32
G1–G32
00
1
0
0
528 x 40 dots
40
G1–G40
00
1
0
1
528 x 48 dots
48
G1–G48
00
1
1
0
528 x 56 dots
56
G1–G56
00
1
1
1
528 x 64 dots
64
G1–G64
01
0
0
0
528 x 72 dots
72
G1–G72
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
⋅
11
0
0
0
528 x 200 dots
200
G1–G200
11
0
0
1
528 x 208 dots
208
G1–G208
11
0
1
0
528 x 216 dots
216
G1–G216
11
0
1
1
528 x 224 dots
224
G1–G224
11
1
0
0
528 x 232 dots
232
G1–G232
11
1
0
1
528 x 240 dots
240
G1–G240
Note 1) A front porch period (set in the FP register) and a back porch period (set in the BP register) will be
inserted as a blank period before and after driving all gate lines
LCD Driving Wave Form Control (R02h)
R/W RS
W1
IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
0 0 0 0 FLD1 FLD0 B/C EOR 0 0 NW5 NW4 NW3 NW2 NW1 NW0
FLD1-0: Specify the number of fields during n-field interlaced drive. For details, see the “interlaced drive”
section.
This function is not available when an external display interface is selected. In the external display
interface mode, make sure FLD1-0= “01”
Rev.0.12, May 09 2003, page 32 of 156