HD66789 Datasheet, PDF (85/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
The VSYNC-I/F has limits on the minimum speed for RAM write through a system interface and the
frequency of the internal clock. It requires RAM write speed more than the result that is calculated from
the following formula.
• Internal clock frequency (fosc) [Hz] = Frame frequency × (Display line (NL) + Front porch (FP) + Back
porch (BP)) × 16 clocks × Fluctuation
• Minimum speed for RAM write (min.)[Hz] > 176 × Display line (NL) / {((Back porch (BP) +
Display raster-row (NL) - Margin) × 16 clocks) / fosc}
Note 1) When RAM write does not start right after the falling edge of VSYNC, the time between the falling
edge of VSYNC and the start of RAM write must also be taken into account.
An example of the RAM write speed and the frequency of the internal clock in the VSYNC interface mode
is as follows.
[Example]
Display size
Display line
Back/front porch
Frame frequency
176 RGB × 240 lines
240 lines (NL = 11110)
14/2 lines (BP = 1110/FP = 0010)
60 Hz
Internal clock frequency (fosc) [Hz] = 60 Hz × (240 + 2 + 14) × 16 Clock × 1.1 / 0.9 = 300 kHz
When calculating the internal clock frequency, possible causes of fluctuations must also be taken into
consideration. The allowance for this fluctuation is ± 10 % from the center value, and the range of the
frequency must be within VSYNC period.
As the causes of fluctuations, the above example takes the variation in the LSI fabrication and the room
temperature into account. Other possible causes of fluctuations, such as variation in the external resistors
or the voltage change are not considered in the above example. It is necessary to make a setting with
enough margins to include the allowances for these factors.
Minimum speed for RAM writing [Hz]
> 176 × 240 / {((14 + 240 - 2) raster-rows × 16 clock) / 300 kHz} = 3.14 MHz
In this case, RAM write is performed in synchronization with the falling edge of VSYNC.
When the data for one frame are written to RAM completely, there must be more than 2 raster-rows of
margin before the raster-rows driven for the display.
By writing data to RAM on the falling edge of VSYNC at the speed of 3.14 MHz or more, the data for the
whole screen on RAM are overwritten before the display operation starts. Accordingly, the flicker due to
updating moving picture data can be avoided while displaying a moving picture.
Rev.0.12, May 09 2003, page 85 of 156