HD66789 Datasheet, PDF (37/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
REV: When REV = 1, a reverse display is shown. Inverting the grayscale levels allows the display of
same data on both normally white and normally black panels. The source output during front, back porch
periods and blank periods during the 2-split-screen display is made in accordance with settings with PT1-0
bits.
Source Output in the Display Area
Source Output in the Display Area*
REV
GRAM Data
Positive Polarity
Negative Polarity
18’h00000
V31
V0
0
18’h3FFFF
V0
V31
18’h00000
V0
V31
1
18’h3FFFF
V31
V0
Note: The output on the source lines during the front and back porch periods and blanking of the partial
display is determined with PT1-0 bits.
GON: When GON = 0, the gate-off level is GND.
DTE: When DTE = 0, the DISPTMG output is fixed to GND.
GON Bit
GON
0
1
Gate Output
VGH/GND
VGH/VGL
DTE Bit
DTE
0
1
DISPTMG Output
Halt (GND)
Operation (Vcc/GND)
D1–0: The graphics display is on when D1 = 1, and off when D1 = 0. When setting D1 = 0, the data are
retained in GRAM. This means the graphics is instantly redisplayed when setting D1 to 1. When D1 is 0
(i.e., the display is off) all the source outputs are set to the GND level. This reduces the charged/discharged
current on LCD, accompanied by the liquid crystal AC drive.
When D1-0 = 01, the HD66789 continues the internal display operation, even while the external display is
off. When D1-0 = 00, both the internal display operations and the external display operation are halted.
In combination with GON and DTE bits, D1-0 bits control ON/OFF of display. For details, see the
“Instruction Setting Flow” section.
Rev.0.12, May 09 2003, page 37 of 156