HD66789 Datasheet, PDF (35/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
I/D1-0="00”
horizontal : decrement
vertical : decrement
0000h
I/D1-0="01”
horizontal : increment
vertical : decrement
0000h
I/D1-0="10”
horizontal : decrement
vertical : increment
I/D1-0="11”
horizontal : increment
vertical : increment
0000h
0000h
AM="0”
horizontal
AM="1”
vertical
0000h
EFAFh
0000h
EFAFh
0000h
EFAFh
0000h
EFAFh
EFAFh
EFAFh
EFAFh
Note : Data are written only on the GRAM area specified with the window
addresses when window addresses are set.
EFAFh
Address transition direction
LG2–0: Rewrite data to GRAM after comparing the data that are written by the microcomputer to GRAM
with the values in the compare registers (CP17–0) and performing logical operation. For details, see the
“Graphics Operation function”
CP17–0: Set the value for the compare register, with which the data read out from GRAM or data written
to GRAM by the microcomputer are compared. This function is not available with the external display
interface mode. In the external display interface mode, make sure LG2-0 = “000”.
BGR: Reverse the order from R, G, B to B, G, R to the 18-bit data to write to GRAM. When setting BGR
= 1, CP17-0 and WM17-0 bits will be automatically changed to the same effect.
Write data to GRAM ^{Note 1)}
18 bits
0000000111001110
Conversion between RGB and BGR (BGR)
Logical/compare operation ^{Logical operation (write data)}
(LG2-0) ^{LG2-0 = 000: Replacement}
Compare operation (with compare register)
LG2-0 = 110: Replacement of matched write data
LG2-0 = 111: Replacement of unmatched write data
Write data to
GRAM (WM17-0) ^{Note 2)}
Write data mask (WM17-0)
GRAM
Note 1) Data write to GRAM is executed by 18 bits. Logical operation is also executed by 18 bits.
As to the assignment of bits, see the description regarding each bit data bus interface.
Note 2) Write data mask (WM17-0) is set with the RAM write data mask register.
Logic/Compare Operation
Rev.0.12, May 09 2003, page 35 of 156