HD66789 Datasheet, PDF (38/156 Pages) Renesas Technology Corp – 528-channel, One-chip Driver for Amorphous TFT Panels with 262,144-color display RAM, Power Supply Circuit, and Gate Circuit

HD66789
Preliminary
D1-0
D1 D0
Source Output
HD67789
Gate-Driver Control Signals
Internal Operations (CL1, FLM, and M)
0
0
GND
Halt
Halt
0
1
GND
Operate
Operate
1
0
Unlit display
Operate
Operate
1
1
Display
Operate
Operate
Note 1) Data are written to GRAM from the microcomputer irrespective of the setting of D1-0 bits.
Note 2) In the standby mode, D1-0 = "00". However, the D1-0 register setting before entering standby
modes is retained.
Display Control 2 (R08h)
R/W RS
W1
IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
0 0 0 0 FP3 FP2 FP1 FP0 0 0 0 0 BP3 BP2 BP1 BP0
FP3-0/BP3-0: Make settings for blank periods (the front and back porches), which are placed at the
beginning and end of the display. FP3-0 and BP3-0 bits specify the number of raster-rows for the front and
back porch respectively. When making this setting, make sure:
BP + FP = <16 raster-rows
FP >= 2 raster-rows
BP >= 2 raster-rows
In the external display interface mode, the back porch (BP) starts on the falling edge of VSYNC signal,
followed by display operation. After displaying the number of raster-rows set with NL bits, the front porch
starts. After the front porch, a blank period ensues until an input of next VSYNC signal.
Rev.0.12, May 09 2003, page 38 of 156