4507_M Datasheet, PDF (57/216 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4507 Group
HARDWARE
FUNCTION BLOCK OPERATIONS
CLOCK CONTROL
The clock control circuit consists of the following circuits.
• On-chip oscillator (internal oscillator)
• Ceramic resonator
• RC oscillation circuit
• Multi-plexer (clock selection circuit)
• Frequency divider
• Internal clock generating circuit
The system clock and the instruction clock are generated as the
source clock for operation by these circuits.
Figure 40 shows the structure of the clock control circuit.
The 4507 Group operates by the on-chip oscillator clock (f(RING))
which is the internal oscillator after system is released from reset.
Also, the ceramic resonator or the RC oscillation can be used for
the source oscillation (f(XIN)) of the 4507 Group. The CMCK in-
struction or CRCK instruction is executed to select the ceramic
resonator or RC oscillator, respectively.
On-chip oscillator
(internal oscillator)
(Note 1)
RC oscillation circuit
XIN
XOUT
Ceramic resonator
circuit
Multiplexer
Division circuit
divided by 8
divided by 4
divided by 2
QS
QR
MR3, MR2
11
10
01
00
QS
R
System clock
Internal clock
generation circuit
(divided by 3)
Instruction clock
Counter
Wait time (Note 2)
control circuit
Program
start signal
CRCK instruction
QS
R
QS
R
CMCK
instruction
RESET pin
Key-on wakeup signal
EPOF instruction + POF2 instruction
Notes 1: System operates by the on-chip oscillator clock (f(RING)) until the CMCK or CRCK instruction
is executed after system is released from reset.
2: The wait time control circuit is used to generate the time required to stabilize the f(XIN) oscillation.
After the certain oscillation stabilizing wait time elapses, the program start signal is output.
This circuit operates when system is released from reset or returned from RAM back-up.
Fig. 40 Clock control circuit structure
Rev.2.01 Feb 04, 2005
REJ09B0195-0201
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