4507_M Datasheet, PDF (16/216 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4507 Group
HARDWARE
PERFORMANCE OVERVIEW
PERFORMANCE OVERVIEW
Parameter
Function
Number of basic instructions
112
Minimum instruction execution time
0.68 µs (at 4.4 MHz oscillation frequency, in high-speed mode)
Memory sizes ROM M34507M2 2048 words ✕ 10 bits
M34507M4/E4 4096 words ✕ 10 bits
RAM
M34507M2
128 words ✕ 4 bits
M34507M4/E4 256 words ✕ 4 bits
Input/Output D0–D5 I/O
ports
Six independent I/O ports.
Input is examined by skip decision.
Ports D2 and D3 are equipped with a pull-up function and a key-on wakeup function. Both func-
tions can be switched by software.
Ports D2 and D3 are also used as ports C and K, respectively.
P00–P03 I/O
4-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
P10–P13 I/O
4-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
Ports P12 and P13 are also used as CNTR and INT, respectively.
P20, P21 I/O
2-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
Ports P20 and P21 are also used as AIN0 and AIN1, respectively.
P30, P31 I/O
2-bit I/O port; Ports P30 and P31 are also used as AIN2 and AIN3, respectively.
C
I/O
1-bit I/O; Port C is also used as port D2.
K
I/O
1-bit I/O; Port K is also used as port D3.
CNTR Timer I/O
1-bit I/O; CNTR pin is also used as port P12.
INT
Interrupt input 1-bit input; INT pin is also used as port P13.
AIN0, AIN1 Analog input Four independent I/O ports; AIN0–AIN3 are also used as P20, P21, P30 and P31, respectively.
AIN2, AIN3
Timers
Timer 1
8-bit programmable timer with a reload register.
Timer 2
8-bit programmable timer with a reload register and has a event counter.
A/D
10-bit wide, This is equipped with an 8-bit comparator function.
converter Analog input
4 channel (AIN0 pin–AIN3 pin)
Interrupt
Sources
4 (one for external, two for timer, one for A/D)
Nesting
1 level
Subroutine nesting
8 levels
Device structure
CMOS silicon gate
Package
24-pin plastic molded SSOP (PRSP0024GA-A)
Operating temperature range
–20 °C to 85 °C
Supply voltage
2.0 V to 5.5 V (It depends on the oscillation frequency and operating mode. Refer to the recom-
mended operating condition.)
Power
Active mode
dissipation
1.7 mA (Ta=25°C, VDD = 5.0 V, 4.0 MHz oscillation frequency, in high-speed mode, output tran-
sistors in the cut-off state)
(typical value)
0.5 mA (Ta=25°C, VDD = 3.0 V, 2.0 MHz oscillation frequency, in high-speed mode, output tran-
sistors in the cut-off state)
RAM back-up mode
0.1 µA (Ta=25°C, VDD = 5 V, output transistors in the cut-off state)
Rev.2.01 Feb 04, 2005
1-4
REJ09B0195-0201