4507_M Datasheet, PDF (46/216 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4507 Group
HARDWARE
FUNCTION BLOCK OPERATIONS
Table 13 Change of successive comparison register AD during A/D conversion
At starting conversion
1st comparison
2nd comparison
3rd comparison
Change of successive comparison register AD
-------------
1
0
0 ----- 0
0
0
-------------
-------------
✼1
1
0 ----- 0
0
0
-------------
-------------
✼1 ✼2
1
----- 0
0
0
-------------
After 10th comparison
completes
A/D conversion result
-------------
✼1 ✼2 ✼3 ----- ✼8 ✼9 ✼A
-------------
✼1: 1st comparison result
✼3: 3rd comparison result
✼9: 9th comparison result
✼2: 2nd comparison result
✼8: 8th comparison result
✼A: 10th comparison result
VDD
2
VDD
2
VDD
2
VDD
2
Comparison voltage (Vref) value
VDD
±
4
VDD
VDD
± ₄ ±₈
±
○
○
○
○
±
VDD
1024
(7) A/D conversion timing chart
Figure 29 shows the A/D conversion timing chart.
ADST instruction
A/D conversion
completion flag (ADF)
DAC operation signal
62 machine cycles
Fig. 29 A/D conversion timing chart
(8) How to use A/D conversion
How to use A/D conversion is explained using as example in which
the analog input from P21/AIN1 pin is A/D converted, and the high-
order 4 bits of the converted data are stored in address M(Z, X, Y)
= (0, 0, 0), the middle-order 4 bits in address M(Z, X, Y) = (0, 0, 1),
and the low-order 2 bits in address M(Z, X, Y) = (0, 0, 2) of RAM.
The A/D interrupt is not used in this example.
➀ Select the AIN1 pin function and A/D conversion mode with the
register Q1 (refer to Figure 30).
➁ Execute the ADST instruction and start A/D conversion.
➂ Examine the state of ADF flag with the SNZAD instruction to de-
termine the end of A/D conversion.
➃ Transfer the low-order 2 bits of converted data to the high-order
2 bits of register A (TALA instruction).
➄ Transfer the contents of register A to M (Z, X, Y) = (0, 0, 2).
➅ Transfer the high-order 8 bits of converted data to registers A
and B (TABAD instruction).
➆ Transfer the contents of register A to M (Z, X, Y) = (0, 0, 1).
➇ Transfer the contents of register B to register A, and then, store
into M(Z, X, Y) = (0, 0, 0).
(Bit 3)
00
(Bit 0)
0 1 A/D control register Q1
Fig. 30 Setting registers
AIN1 pin selected
A/D conversion mode
Rev.2.01 Feb 04, 2005
REJ09B0195-0201
1-34