HD64F3694HV Datasheet, PDF (225/452 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 14 Serial Communication Interface 3 (SCI3)
Initial
Bit
Bit Name Value R/W Description
3
MPIE
0
R/W Multiprocessor Interrupt Enable (enabled only when the
MP bit in SMR is 1 in asynchronous mode)
When this bit is set to 1, receive data in which the
multiprocessor bit is 0 is skipped, and setting of the
RDRF, FER, and OER status flags in SSR is prohibited.
On receiving data in which the multiprocessor bit is 1, this
bit is automatically cleared and normal reception is
resumed. For details, refer to section 14.6,
Multiprocessor Communication Function.
2
TEIE
0
R/W Transmit End Interrupt Enable
When this bit is set to 1, the TEI interrupt request is
enabled.
1
CKE1
0
R/W Clock Enable 0 and 1
0
CKE0
0
R/W Selects the clock source.
Asynchronous mode:
00: Internal baud rate generator
01: Internal baud rate generator
Outputs a clock of the same frequency as the bit rate
from the SCK3 pin.
10: External clock
Inputs a clock with a frequency 16 times the bit rate
from the SCK3 pin.
11: Reserved
Clocked synchronous mode:
00: Internal clock (SCK3 pin functions as clock output)
01: Reserved
10: External clock (SCK3 pin functions as clock input)
11: Reserved
Rev.5.00 Nov. 02, 2005 Page 195 of 418
REJ09B0028-0500