HD64F3694HV Datasheet, PDF (15/452 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

11.3.2 Time Constant Registers A and B (TCORA, TCORB) ........................................ 139
11.3.3 Timer Control Register V0 (TCRV0) ................................................................... 140
11.3.4 Timer Control/Status Register V (TCSRV) .......................................................... 142
11.3.5 Timer Control Register V1 (TCRV1) ................................................................... 143
11.4 Operation ........................................................................................................................... 144
11.4.1 Timer V Operation................................................................................................ 144
11.5 Timer V Application Examples ......................................................................................... 148
11.5.1 Pulse Output with Arbitrary Duty Cycle............................................................... 148
11.5.2 Pulse Output with Arbitrary Pulse Width and Delay from TRGV Input .............. 149
11.6 Usage Notes ....................................................................................................................... 150
Section 12 Timer W ...........................................................................................153
12.1 Features.............................................................................................................................. 153
12.2 Input/Output Pins ............................................................................................................... 156
12.3 Register Descriptions ......................................................................................................... 156
12.3.1 Timer Mode Register W (TMRW) ....................................................................... 157
12.3.2 Timer Control Register W (TCRW) ..................................................................... 158
12.3.3 Timer Interrupt Enable Register W (TIERW) ...................................................... 159
12.3.4 Timer Status Register W (TSRW) ........................................................................ 160
12.3.5 Timer I/O Control Register 0 (TIOR0) ................................................................. 161
12.3.6 Timer I/O Control Register 1 (TIOR1) ................................................................. 163
12.3.7 Timer Counter (TCNT)......................................................................................... 164
12.3.8 General Registers A to D (GRA to GRD)............................................................. 164
12.4 Operation ........................................................................................................................... 165
12.4.1 Normal Operation ................................................................................................. 165
12.4.2 PWM Operation.................................................................................................... 169
12.5 Operation Timing............................................................................................................... 174
12.5.1 TCNT Count Timing ............................................................................................ 174
12.5.2 Output Compare Output Timing ........................................................................... 174
12.5.3 Input Capture Timing............................................................................................ 175
12.5.4 Timing of Counter Clearing by Compare Match .................................................. 176
12.5.5 Buffer Operation Timing ...................................................................................... 176
12.5.6 Timing of IMFA to IMFD Flag Setting at Compare Match.................................. 177
12.5.7 Timing of IMFA to IMFD Setting at Input Capture ............................................. 178
12.5.8 Timing of Status Flag Clearing............................................................................. 178
12.6 Usage Notes ....................................................................................................................... 179
Section 13 Watchdog Timer ..............................................................................183
13.1 Features.............................................................................................................................. 183
13.2 Register Descriptions ......................................................................................................... 184
Rev.5.00 Nov. 02, 2005 Page xiii of xxviii