SAA7104E Datasheet, PDF (60/70 Pages) NXP Semiconductors – Digital video encoder

Philips Semiconductors
Digital video encoder
Product specification
SAA7104E; SAA7105E
11.1 Teletext timing
Time t_FD is the time needed to interpolate input data TTX
and insert it into the CVBS and VBS output signal, such
that it appears at t_TTX = 9.78 µs (PAL) or t_TTX = 10.5 µs
(NTSC) after the leading edge of the horizontal
synchronization pulse.
Time t_PD is the pipeline delay time introduced by the
source that is gated by TTXRQ_XCLKO2 in order to
deliver TTX data. This delay is programmable by register
TTXHD. For every active HIGH state at output pin
TTXRQ_XCLKO2, a new teletext bit must be provided by
the source.
Since the beginning of the pulses representing the TTXRQ
signal and the delay between the rising edge of TTXRQ
and valid teletext input data are fully programmable
(TTXHS and TTXHD), the TTX data is always inserted at
the correct position after the leading edge of the outgoing
horizontal synchronization pulse.
Time t_i(TTXW) is the internally used insertion window for
TTX data; it has a constant length that allows insertion of
360 teletext bits at a text data rate of 6.9375 Mbits/s (PAL),
296 teletext bits at a text data rate of 5.7272 Mbits/s (world
standard TTX) or 288 teletext bits at a text data rate of
5.7272 Mbits/s (NABTS). The insertion window is not
opened if the control bit TTXEN is zero.
Using appropriate programming, all suitable lines of the
odd field (TTXOVS and TTXOVE) plus all suitable lines of
the even field (TTXEVS and TTXEVE) can be used for
teletext insertion.
It is essential to note that the two pins used for teletext
insertion must be configured for this purpose by the
correct I²C-bus register settings.
handbook, full pagewidth
CVBS / Y
TTX_SRES
t _TTX
t _{i (TTXW)}
text bit #: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
t _PD
t _FD
TTXRQ_XCLKO2
MHB891
Fig.14 Teletext timing.
2004 Mar 04
60