SAA7104E Datasheet, PDF (29/70 Pages) NXP Semiconductors – Digital video encoder

Philips Semiconductors
Digital video encoder
Product specification
SAA7104E; SAA7105E
7.24 Slave receiver
Table 24 Subaddress 16H
DATA BYTE
DESCRIPTION
DACF
output level adjustment fine in 1% steps for all DACs; default after reset is 00H; see Table 25
Table 25 Fine adjustment of DAC output voltage
BINARY
0111
0110
0101
0100
0011
0010
0001
0000
1000
1001
1010
1011
1100
1101
1110
1111
GAIN (%)
7
6
5
4
3
2
1
0
0
−1
−2
−3
−4
−5
−6
−7
Table 26 Subaddresses 17H to 19H
DATA BYTE
RDACC
GDACC
BDACC
DESCRIPTION
output level coarse adjustment for RED DAC; default after reset is 1BH for output of C signal
00000b ≡ 0.585 V to 11111b ≡ 1.240 V at 37.5 Ω nominal for full-scale conversion
output level coarse adjustment for GREEN DAC; default after reset is 1BH for output of VBS signal
00000b ≡ 0.585 V to 11111b ≡ 1.240 V at 37.5 Ω nominal for full-scale conversion
output level coarse adjustment for BLUE DAC; default after reset is 1FH for output of CVBS signal
00000b ≡ 0.585 V to 11111b ≡ 1.240 V at 37.5 Ω nominal for full-scale conversion
Table 27 Subaddress 1AH
DATA BYTE
DESCRIPTION
MSMT
monitor sense mode threshold for DAC output voltage, should be set to 70
2004 Mar 04
29