306666-11 Datasheet, PDF (66/99 Pages) Numonyx B.V – Numonyx StrataFlash Embedded Memory

P30
If a block is locked or locked-down during an erase suspend of the same block, the lock
status bits change immediately. However, the erase operation completes when it is
resumed. Block lock operations cannot occur during a program suspend. See Appendix
A, “Write State Machine” on page 72, which shows valid commands during an erase
suspend.
13.2
Selectable One-Time Programmable Blocks
Any of four pre-defined areas from the main array (the four 32-KB parameter blocks
together as one and three adjacent 128 KB main blocks) can be configured as OTP so
further program and erase operations are not allowed. This option is available for top or
bottom parameter devices.
Table 31: Selectable OTP Block Mapping
Density
Top Parameter Configuration
256-Mbit
blocks 258:255 (parameters)
block 254 (main)
block 253 (main)
block 252 (main)
Bottom Parameter Configuration
blocks 3:0 (parameters)
block 4 (main)
block 5 (main)
block 6 (main)
128-Mbit
blocks 130:127 (parameters)
block 126 (main)
block 125 (main)
block 124 (main)
blocks 3:0 (parameters)
block 4 (main)
block 5 (main)
block 6 (main)
blocks 66:63 (parameters)
blocks 3:0 (parameters)
64-Mbit
block 62 (main)
block 61 (main)
block 4 (main)
block 5 (main)
block 60 (main)
block 6 (main)
Notes:
1.
The 512-Mbit devices will have multiple die and selectable OTP areas depending on the placement of the parameter
blocks.
2.
When programming the OTP bits for a Top Parameter Device, the following upper address bits must also be driven
properly: A[Max:17] driven high (V_IH) for TSOP and Easy BGA packages, and A[Max:16] driven high (V_IH) for QUAD+
SCSP.
Note: Please see your local Numonyx representative for details about the Selectable OTP
implementation.
13.3
Protection Registers
The device contains 17 Protection Registers (PRs) that can be used to implement
system security measures and/or device identification. Each Protection Register can be
individually locked.
The first 128-bit Protection Register is comprised of two 64-bit (8-word) segments. The
lower 64-bit segment is pre-programmed at the Numonyx factory with a unique 64-bit
number. The other 64-bit segment, as well as the other sixteen 128-bit Protection
Registers, are blank. Users can program these registers as needed. When programmed,
users can then lock the Protection Register(s) to prevent additional bit programming
(see Figure 31, “Protection Register Map” on page 67).
Datasheet
66
November 2007
Order Number: 306666-11