306666-11 Datasheet, PDF (65/99 Pages) Numonyx B.V – Numonyx StrataFlash Embedded Memory

P30
13.1.4 Block Lock Status
The Read Device Identifier command is used to determine a block’s lock status (see
Section 14.2, “Read Device Identifier” on page 70). Data bits DQ[1:0] display the
addressed block’s lock status; DQ0 is the addressed block’s lock bit, while DQ1 is the
addressed block’s lock-down bit.
Figure 30: Block Locking State Diagram
P ow er -U p /R es et
Locked
[X01]
Locked-
Down^4,5
[011]
Hardware
Locked⁵
[011]
WP# Hardware Control
Unlocked
[X00]
Software
Locked
[111]
Unlocked
[110]
Software Block Lock (0x60/0x01) or Software Block Unlock (0x60/0xD0)
Software Block Lock-Down (0x60/0x2F)
WP# hardware control
Notes:
1. [a,b,c] represents [WP#, DQ1, DQ0]. X = Don’t Care.
2. DQ1 indicates Block Lock-Down status. DQ1 = ‘0’, Lock-Down has not been issued
to this block. DQ1 = ‘1’, Lock-Down has been issued to this block.
3. DQ0 indicates block lock status. DQ0 = ‘0’, block is unlocked. DQ0 = ‘1’, block is
locked.
4. Locked-down = Hardware + Software locked.
5. [011] states should be tracked by system software to determine difference between
Hardware Locked and Locked-Down states.
13.1.5 Block Locking During Suspend
Block lock and unlock changes can be performed during an erase suspend. To change
block locking during an erase operation, first issue the Erase Suspend command.
Monitor the Status Register until SR[7] and SR[6] are set, indicating the device is
suspended and ready to accept another command.
Next, write the desired lock command sequence to a block, which changes the lock
state of that block. After completing block lock or unlock operations, resume the erase
operation using the Erase Resume command.
Note:
A Lock Block Setup command followed by any command other than Lock Block, Unlock Block,
or Lock-Down Block produces a command sequence error and set Status Register bits SR[4]
and SR[5]. If a command sequence error occurs during an erase suspend, SR[4] and SR[5]
remains set, even after the erase operation is resumed. Unless the Status Register is cleared
using the Clear Status Register command before resuming the erase operation, possible erase
errors may be masked by the command sequence error.
November 2007
Order Number: 306666-11
Datasheet
65