306666-11 Datasheet, PDF (16/99 Pages) Numonyx B.V – Numonyx StrataFlash Embedded Memory

P30
4.0
Ballout and Signal Descriptions
4.1
Signal Ballout
Figure 6: 56-Lead TSOP Pinout (64/128/256/512- Mbit)
A16
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A23
9
A22
10
A21
11
VSS
12
VCC
13
WE#
14
WP#
15
A20
16
A19
17
A18
18
A8
19
A7
20
A6
21
A5
22
A4
23
A3
24
A2
25
A24
26
A25
27
VSS
28
Intel StrataFlash®
Embedded Memory (P30)
56-Lead TSOP Pinout
14 mm x 20 mm
Top View
56
WAIT
55
A17
54
DQ15
53
DQ7
52
DQ14
51
DQ6
50
DQ13
49
DQ5
48
DQ12
47
DQ4
46
ADV#
45
CLK
44
RST#
43
VPP
42
DQ11
41
DQ3
40
DQ10
39
DQ2
38
VCCQ
37
DQ9
36
DQ1
35
DQ8
34
DQ0
33
VCC
32
OE#
31
VSS
30
CE#
29
A1
Notes:
1.
A1 is the least significant address bit.
2.
A23 is valid for 128-Mbit densities and above; otherwise, it is a no connect (NC).
3.
A24 is valid for 256-Mbit densities; otherwise, it is a no connect (NC).
4.
A25 is valid for 512-Mbit densities; otherwise, it is a no connect (NC).
5.
Please refer to the latest specification update for synchronous read operation with the TSOP package. The synchronous read
input signals (i.e. ADV# and CLK) should be tied off to support asynchronous reads. See Section 4.2, “Signal Descriptions”
on page 19.
Datasheet
16
November 2007
Order Number: 306666-11