306666-11 Datasheet, PDF (21/99 Pages) Numonyx B.V – Numonyx StrataFlash Embedded Memory

P30
Table 6: QUAD+ SCSP Signal Descriptions (Sheet 2 of 2)
Symbol
VCC
VCCQ
VSS
RFU
DU
NC
Type
Name and Function
Power
Power
Power
—
—
—
Device Core Power Supply: Core (logic) source voltage. Writes to the flash array are inhibited
when V_CC ≤ V_LKO. Operations at invalid V_CC voltages should not be attempted.
Output Power Supply: Output-driver source voltage.
Ground: Connect to system ground. Do not float any VSS connection.
Reserved for Future Use: Reserved by Numonyx for future device functionality and enhancement.
These should be treated in the same way as a Do Not Use (DU) signal.
Do Not Use: Do not connect to any other signal, or power supply; must be left floating.
No Connect: No internal connection; can be driven or floated.
4.3
Dual-Die Configurations
Figure 9: 512-Mbit Easy BGA and TSOP Top or Bottom Parameter Block Diagram
Easy BGA & TSOP 512-Mbit (Dual-Die) Top or Bottom Parameter
Configuration
CE#
WP#
OE#
WE#
CLK
ADV#
A[MAX:1]
Top Param Die
(256-Mbit)
Bottom Param Die
(256-Mbit)
RST#
VCC
VPP
VCCQ
VSS
DQ[15:0]
WAIT
Figure 10: 512-Mbit QUAD+ SCSP Top or Bottom Parameter Block Diagram
QUAD+ 512-Mbit (Dual-Die) Top or Bottom Parameter
Configuration
F1-CE#
WP#
OE#
WE#
CLK
ADV#
A[MAX:0]
Top Param Die
(256-Mbit)
Bottom Param Die
(256-Mbit)
RST#
VCC
VPP
VCCQ
VSS
DQ[15:0]
WAIT
Note: A_max = V_ih selects the Top parameter Die; A_max = V_il selects the Bottom Parameter Die.
November 2007
Order Number: 306666-11
Datasheet
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