306666-11 Datasheet, PDF (54/99 Pages) Numonyx B.V – Numonyx StrataFlash Embedded Memory

P30
10.3.6
Burst Sequence
The Burst Sequence (BS) bit selects linear-burst sequence (default). Only linear-burst
sequence is supported. Table 28 shows the synchronous burst sequence for all burst
lengths, as well as the effect of the Burst Wrap (BW) setting.
Table 28: Burst Sequence Word Ordering
Start
Addr.
(DEC)
Burst
Wrap
(RCR[3])
0
0
1
0
2
0
3
0
4
0
5
0
6
0
7
0
4-Word Burst
(BL[2:0] =
0b001)
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
Burst Addressing Sequence (DEC)
8-Word Burst
(BL[2:0] = 0b010)
16-Word Burst
(BL[2:0] = 0b011)
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
0-1-2-3-4…14-15
1-2-3-4-5…15-0
2-3-4-5-6…15-0-1
3-4-5-6-7…15-0-1-2
4-5-6-7-8…15-0-1-2-3
5-6-7-8-9…15-0-1-2-3-4
6-7-8-9-10…15-0-1-2-3-4-
5
7-8-9-10…15-0-1-2-3-4-5-
6
Continuous Burst
(BL[2:0] = 0b111)
0-1-2-3-4-5-6-…
1-2-3-4-5-6-7-…
2-3-4-5-6-7-8-…
3-4-5-6-7-8-9-…
4-5-6-7-8-9-10…
5-6-7-8-9-10-11…
6-7-8-9-10-11-12-…
7-8-9-10-11-12-13…
14
0
15
0
14-15-0-1-2…12-13
15-0-1-2-3…13-14
14-15-16-17-18-19-20-…
15-16-17-18-19-20-21-…
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
0-1-2-3
1-2-3-4
2-3-4-5
3-4-5-6
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-8
2-3-4-5-6-7-8-9
3-4-5-6-7-8-9-10
4-5-6-7-8-9-10-11
5-6-7-8-9-10-11-12
6-7-8-9-10-11-12-13
7-8-9-10-11-12-13-
14
0-1-2-3-4…14-15
1-2-3-4-5…15-16
2-3-4-5-6…16-17
3-4-5-6-7…17-18
4-5-6-7-8…18-19
5-6-7-8-9…19-20
6-7-8-9-10…20-21
7-8-9-10-11…21-22
0-1-2-3-4-5-6-…
1-2-3-4-5-6-7-…
2-3-4-5-6-7-8-…
3-4-5-6-7-8-9-…
4-5-6-7-8-9-10…
5-6-7-8-9-10-11…
6-7-8-9-10-11-12-…
7-8-9-10-11-12-13…
14
15
10.3.7
1
14-15-16-17-18…28-29
14-15-16-17-18-19-20-…
1
15-16-17-18-19…29-30
15-16-17-18-19-20-21-…
Clock Edge
The Clock Edge (CE) bit selects either a rising (default) or falling clock edge for CLK.
This clock edge is used at the start of a burst cycle, to output synchronous data, and to
assert/deassert WAIT.
Datasheet
54
November 2007
Order Number: 306666-11