CP3BT26 Datasheet, PDF (79/278 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

16.0 12-Bit Analog to Digital Converter
The integrated 12-bit ADC provides the following features:
„ 8-input analog multiplexer
„ 8 single-ended channels or 4 differential channels
„ External filtering capability
„ 12-bit resolution with 11-bit accuracy
„ Sign bit
„ 15-microsecond conversion time
„ Support for resistive touchscreen interface
„ Internal or external start trigger
„ Programmable start delay after start trigger
„ Poll or interrupt on done
MUXOUT0 MUXOUT1 ADCIN
VREFP AVCC ADC0 ADC1 AGND ADC2 ADC3
ADC0/TSX+
ADC1/TSY-
ADC2/TSX-
ADC3/TSY+
ADC4
Pen-Down Detector
DRV
DRV
DRV
DRV
Input
Multi-
plexer
+
-
ADC7
TOUCH_CFG
MUX_CFG
ADC_DIV
PREF_CFG
NREF_CFG
Int/Ext
Multi-
plexer
ADCIN
VREFP
+
-
Clock
12-BIT ADC
Control
VREFN
Result
12
Pen Down
Wake-Up
(WUI30)
ADC Clock
Start
ADC
SEQUENCER
Done
Interrupt
(IRQ13)
ASYNC
TRIGGER
DELAY1
CLKDIV
DELAY2
4-Word
FIFO
ADC_CONTROL
ADC_DELAY1
CLKSEL
ADC_DELAY2
System Auxiliary
Clock Clock 2
ADCRESLT
System
Bus
Interface
DS183
Figure 24. Analog to Digital Converter Block Diagram
16.1 FUNCTIONAL DESCRIPTION
The ADC module consists of a 12-bit ADC converter and as-
sociated state machine, together with analog multiplexers to
set up signal paths for sampling and voltage references, log-
ic to control triggering of the converter, and a bus interface.
16.1.1 Data Path
„ 12-Bit ADC—receives the output of the Internal/External
Multiplexer and performs the analog to digital conver-
sion.
„ ADCRESLT Register—makes conversion results from
the 12-Bit ADC available to the on-chip bus. The AD-
CRESLT register includes the software-visible end of a 4-
word FIFO used to queue conversion results.
Up to 8 GPIO pins may be configured as 8 singled-ended
analog inputs or 4 differential pairs. Analog/digital data
passes through four main blocks in the ADC module be-
tween the input pins and the CPU bus:
„ Input Multiplexer—an analog multiplexer that selects
among the input channels.
„ Internal/External Multiplexer—an analog multiplexer
that selects between the output of the Input Multiplexer
and the ADCIN external analog input.
The configuration of the analog signal paths is controlled by
fields in the ADCGCR register. The Input Multiplexer is con-
trolled by the MUX_CFG field. The Internal/External Multi-
plexer is controlled by the ADCIN bit. The analog
multiplexers for selecting the voltage references used by the
ADC are controlled by the PREF_CFG and NREF_CFG
fields. The low-ohmic drivers used for interface to resistive
touchscreens are controlled by the TOUCH_CFG field.
79
www.national.com