CP3BT26 Datasheet, PDF (160/278 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

The CVSD/PCM module only supports indirect DMA trans-
fers. Therefore, transferring PCM data between the CVSD/
PCM module and another on-chip module requires two bus
cycles.
The trigger for DMA may also trigger an interrupt if the cor-
responding enable bits in the CVCTRL register is set.
Therefore care must be taken when setting the desired in-
terrupt and DMA enable bits. The following conditions must
be avoided:
„ Setting the PCMINT bit and either of the DMAPO or
DMAPI bits.
„ Setting the CVSDINT bit and either of the DMACO or
DMACI bits.
21.8 FREEZE
The CVSD/PCM module provides support for an In-System-
Emulator by means of a special FREEZE input. While
FREEZE is asserted the module will exhibit the following be-
havior:
„ CVSD In FIFO will not have data removed by the con-
verter core.
„ CVSD Out FIFO will not have data added by the convert-
er core.
„ PCM Out buffer will not be updated by the converter
core.
„ The Clear-on-Read function of the following status bits in
the CVSTAT register is disabled:
„ PCMINT
„ CVE
„ CVF
Table 68 CVSD/PCM Registers
Name
LINEAROUT
CVCTRL
CVSTAT
Address
FF FC2Eh
FF FC30h
FF FC32h
Description
Linear PCM
Data Output Register
CVSD Control Regis-
ter
CVSD Status Register
21.9.1 CVSD Data Input Register (CVSDIN)
The CVSDIN register is a 16-bit wide, write-only register. It
is used to write CVSD data into the CVSD to PCM converter
FIFO. The FIFO is 8 words deep. The CVSDIN bit 15 repre-
sents the CVSD data bit at t = t₀, CVSDIN bit 0 represents
the CVSD data bit at t = t₀ - 250 ms.
15
0
CVSDIN
21.9.2 CVSD Data Output Register (CVSDOUT)
The CVSDOUT register is a 16-bit wide read-only register.
It is used to read the CVSD data from the PCM to CVSD
converter. The FIFO is 8 words deep. Reading the CVSD-
OUT register after reset returns undefined data.
15
0
21.9 CVSD/PCM CONVERTER REGISTERS
CVSDOUT
Table 68 lists the CVSD/PCM registers.
Table 68 CVSD/PCM Registers
21.9.3 PCM Data Input Register (PCMIN)
Name
CVSDIN
Address
FF FC20h
Description
CVSD Data Input
Register
The PCMIN register is a 16-bit wide write-only register. It is
used to write PCM data to the PCM to CVSD converter via
the peripheral bus. It is double-buffered, providing a 125 µs
period for an interrupt or DMA request to respond.
CVSDOUT
PCMIN
PCMOUT
LOGIN
LOGOUT
LINEARIN
FF FC22h
FF FC24h
FF FC26h
FF FC28h
FF FC2Ah
FF FC2Ch
CVSD Data Output
Register
PCM Data Input
Register
PCM Data Output
Register
Logarithmic PCM
Data Input Register
Logarithmic PCM
Data Output Register
Linear PCM
Data Input Register
15
0
PCMIN
21.9.4 PCM Data Output Register (PCMOUT)
The PCMOUT register is a 16-bit wide read-only register. It
is used to read PCM data from the CVSD to PCM converter.
It is double-buffered, providing a 125 µs period for an inter-
rupt or DMA request to respond. After reset the PCMOUT
register is clear.
15
0
PCMOUT
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