CP3BT26 Datasheet, PDF (244/278 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

Symbol
Parameter
Conditions
I_L
High Impedance Input Leakage Current ^c
0V ≤ Vin ≤ IOVcc
(except ADC0/TSX+, ADC1/TSY+, ADC2/TSX-,
ADC3/TSY-)
I_L
High Impedance Input Leakage Current
0V ≤ Vin ≤ IOVcc
(for ADC0/TSX+, ADC1/TSY+, ADC2/TSX-,
ADC3/TSY-)
I_O(Off)
Icca1
Output Leakage Current
(I/O pins in input mode)
Digital Supply Current Active Mode ^d
Iccprog Digital Supply Current Active Mode ^e
Iccps Digital Supply Current Power Save Mode ^f
Iccid
Digital Supply Current Idle Mode ^g
Iccq
Digital Supply Current Halt Mode ^g,h
0V ≤ Vout ≤ Vcc
Vcc = 2.75V,
IOVcc=3.63V
Vcc = 2.75V,
IOVcc = 3.63V
Vcc = 2.75V,
IOVcc =3.63V
Vcc = 2.75V,
IOVcc = 3.63V
Vcc = 2.75V,
IOVcc = 3.63V,
20°C
Min
-2.0
-5.0
-2.0
Max
2.0
5.0
2.0
20
20
4
2
150
Units
µA
µA
µA
mA
mA
mA
mA
µA
a. Guaranteed by design
b. Characterized not tested in production.
c. Some pins not tested for leakage due to I/O structure.
d. Run from internal memory (RAM), Iout = 0 mA, X1CKI = 12 MHz, PLL enabled (4×), internal system clock is
24 MHz, not programming Flash memory
e. Same conditions as Icca1, but programming or erasing Flash memory page
f. Running from internal memory (RAM), Iout = 0 mA, XCKI1 = 12 MHz, PLL disabled, X2CKI = 32.768 kHz,
device put in power-save mode, Slow Clock derived from XCKI1
g. Iout = 0 mA, XCKI1 = Vcc, X2CKI = 32.768 kHz
h. Halt current approximately doubles for every 20°C.
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